One day workshop on “VLSI Design Using VHDL Programming Language and Xilinx Tools”
Electronics and Communication Engineering Department, AAA College of Engineering and Technology is organizing a one day workshop on 27.09.18 titled “VLSI Design Using VHDL Programming Language and Xilinx Tools” .The Primary objective of the workshop is to provide basic knowledge to the students on Programming VLSI Design. It will enhance the students to develop projects on VHDL language using Xilinx tools for many applications.
Verilog Hardware Description Language(VHDL) is a hardware description language used in Electronic design automation to describe digital and mixed signal systems such as Field Programmable Gate Arrays and Integrated circuits. VHDL can also be used as a general purpose parallel programming language. It is commonly used to write text models that describe a logic circuit. A simulation program is used to test the logic design using simulation models to represent the logic circuits that interface to the design.
Xilinx is a software tool to simulate VHDL designs. It enables the developer to synthesis andanalyse the designs and configure the target device with the programmer. Xilinx ISE is a design environment for FPGA products from Xilinx and tightly coupled to the architecture of such chips and cannot be used with FPGA products. It is primarily used for circuit synthesis and design